What it is and the problem it solves
A system on a chip is an integrated circuit that combines most or all key components of a computer or electronic system onto a single microchip. It solves the problem of excessive power draw and physical footprint in portable and embedded electronics.
A typical SoC includes a CPU with memory, input/output and data storage control functions, and may add a graphics processing unit, Wi-Fi connectivity and radio frequency processing. High-performance SoCs are often paired with separate memory such as LPDDR and flash storage such as eUFS or eMMC, stacked on top of the SoC in a package-on-package arrangement or placed nearby on the motherboard. Some also operate alongside specialised chips such as cellular modems. There are three types of SoC: those built around a microcontroller, SoCs built around a microprocessor (often found in mobile phones), and application-specific integrated circuit SoCs for uses that fit neither.
How it works
SoCs integrate one or more processor cores with critical peripherals onto a single microchip using MOS technology.
An SoC must have at least one processor core and typically has more than one. A core can be a microcontroller, a microprocessor, a digital signal processor or an application-specific instruction set processor. It also needs semiconductor memory blocks, which may form a memory and cache hierarchy in mobile devices but often do not in low-power embedded microcontrollers. External interfaces are usually based on industry standards such as USB, Ethernet, SPI, HDMI and I²C, with wireless protocols such as Wi-Fi and Bluetooth where needed. The units must send data and instructions to each other, so all but the most trivial SoCs need a communications subsystem. Historically a shared bus connected the blocks, and a common choice was Arm’s royalty-free AMBA standard. In the late 2010s designs began to use a network-like topology called a network on chip, because a growing number of cores made on-chip communication efficiency a key factor in overall performance and cost.
What works
The unified design delivers lower power consumption and reduced semiconductor die area compared to traditional multi-chip architectures. SoCs are ubiquitous in mobile computing because of this compact, energy-efficient design.
In embedded systems, where only microcontrollers could previously be used, tighter integration offers better reliability and mean time between failures, along with more advanced functionality and computing power than a microcontroller. Examples include the STMicroelectronics STM32, the Raspberry Pi Ltd RP2040 and the AMD Zynq 7000. In personal computers, Acorn’s 1992 A3010, A3020 and A4000 machines used the ARM250 SoC, which combined the ARM2 processor with a memory controller, video controller and I/O controller that had been four discrete chips in earlier Acorn ARM computers. On modern laptops and mini PCs, low-power variants of AMD Ryzen and Intel Core processors use an SoC design, though such x86 processors still require external memory and storage chips.
What does not
SoCs sacrifice modularity and component replaceability. They cannot be upgraded core-by-core like multi-chip systems.
Heat is a design constraint. Because most SoCs occupy a small area or volume, there is little room for waste heat to diffuse, and thermal effects force designers to apply conservative design margins that make devices less performant than the fabrication process would otherwise allow. Heterogeneous SoC architectures also produce uneven heat fluxes that uniform passive cooling cannot effectively mitigate. Verifying a design before it is sent to a foundry accounts for a significant portion of the chip design life cycle, often quoted as 70%, and some of the simulation acceleration and emulation systems used for verification cost more than US$1 million. On buses, wire delay does not scale with miniaturisation and long wires consume large amounts of power, challenges that are prohibitive for manycore systems on chip.
What it changes
They shift system architecture from discrete, serviceable chips to monolithic, fixed-function units—locking in performance, power, and peripheral choices at fabrication.
The design flow itself changes too. It aims to develop the hardware and the controlling software at the same time, known as architectural co-design. Most SoCs are assembled from pre-qualified IP core specifications for the hardware blocks, together with software device drivers, using electronic design automation tools. The logic that connects components from different vendors and converts between their interfaces is called glue logic. Because power, die area, communication and latency goals are often directly at odds, designers seek Pareto efficient solutions rather than a single optimum.
Is it worth your time
Yes—if you design, deploy, or maintain embedded systems, mobile devices, or power-constrained hardware. No—if you rely on field-upgradable components or require modular repair.
