10:20in productionCh. 1 · The Tunnel Transistor/ 10:20 · ceiling 15 min
Semiconductors
Carver Mead
Mead didn’t invent the microchip — he invented how to think about shrinking it without guessing.
Mead established semiconductor design as a discipline rooted in quantum transport physics — not process empiricism. His verified contributions span device invention (tunnel transistor, GaAs MESFET), nanoscale electron dynamics (hot-electron retention), scaling theory (multi-dimensional improvement to 0.15 µm), and pedagogy (first LSI course, VLSI textbook, shared-wafer fabrication). He did not foresee CMOS, interconnect bottlenecks, or post-Moore architectures. His framework remains indispensable for anyone modelling devices below 100 nm — but stops where quantum coherence and statistical variation begin.
He built the first three-terminal solid-state device using quantum tunneling — not thermionic emission or diffusion.
2:28
Nanoscale Energy Retention
Hot electrons retain energy over nanometre distances — a physical fact enabling ballistic device design.
3:45
GaAs Over Silicon
The GaAs MESFET used Schottky barriers for gate isolation — a material-specific solution that bypassed silicon’s limitations.
5:09
The Scaling Law and Its Limit
Scaling improves speed, reliability, thermal performance, and cost — but only down to 0.15 microns, per Mead and Hoeneisen.
6:19
The Mead-Conway Method
He turned VLSI from lab practice into teachable, shareable, reproducible engineering — via course, textbook, and shared-wafer fabrication.
Worth your time?
Yes. Study the whole thing.
4.5/ 5
What works
tunneling/hot-electron transistor (1960)
nanoscale hot-electron energy retention (1962)
GaAs MESFET (1966)
transistor scaling law (1968)
What does not
CMOS architecture
interconnect delay
sub-10nm quantum tunnelling effects
power leakage modelling
Study it if
semiconductor device physicists
VLSI educators
process technology strategists
Skip it if
AI hardware accelerators
software developers
cloud infrastructure engineers
The written brief1 min read
What it is and the problem it solves
Carver Mead’s work is a physics-based framework for predicting transistor behaviour at scale. It solves the problem of unguided empirical scaling by grounding device design in electron transport theory.
How it works
Mead built devices grounded in quantum transport physics: tunneling and hot-electron injection in metals, Schottky barrier isolation in GaAs, and scaling laws derived from device physics rather than empirical curve-fitting.
What works
His 1960 tunneling/hot-electron transistor, 1962 nanoscale hot-electron energy retention in gold, 1966 GaAs MESFET, 1968 multi-dimensional scaling demonstration, and 1972 0.15-micron limit prediction all stand as experimentally verified contributions.
What does not
It does not predict or enable CMOS dominance, nor does it address interconnect delay, power leakage, or quantum tunnelling at sub-10nm nodes — all outside the scope of his verified claims.
What it changes
It changes how engineers reason about miniaturisation: from treating transistors as black-box switches to modelling them as quantum-mechanical energy-conversion devices with intrinsic scaling boundaries.
Is it worth your time
Yes — if you design, teach, or fund semiconductor systems. His physics-first methodology remains the only proven way to anticipate scaling limits before fabrication.